I am lucky to have some local people who have worked with KiCad and were willing to help a beginner. I’ve asked for tips before I started, but much of them didn’t make sense until I had a run with my own project. Now I can go back and ask the questions again, and with some firsthand experience to anchor the concepts, the answers make much more sense.
I learned that there were flaws in my schematic. I had connected my PIC micro controller output pin directly to the base of a 2N2222 transistor. I shouldn’t directly expose the 2N2222 to the full voltage and current from the PIC. It is not an immediately catastrophic condition – I got my bread board prototype up and running without them – but in their absence the transistors end up burning much more power than necessary and likely reduces their lifespan. So the schematic receives five additional resistors, one for each transistor.
I also neglected a pull-up resistor recommended for the Vpp pin in the PICkit 3 manual. Again, my bread board seems to run OK without it, but it’s better to follow spec.
These six additional resistors complicate the PCB layout. Fortunately, I received some useful tips here as well. I chose one design pattern to practice: separate the front and back layers into vertical and horizontal traces. This requires copious use of vias to connect these individual segments into a full connection. I had been concerned that every via is a connection and a potential source of failure, but I’ve been reassured that’s not a concern. When the horizontal/vertical division, wire traces can cross paths in a safe manner because the directions keep those traces isolated.
I also learned the concept of a fill zone, which makes it easier to distribute the voltage input and ground to all the components on the chip. Instead of running individual narrow traces that might not be able to handle the full power, they are distributed across all the spare surface area I can reach. I use my front copper layer to distribute power, and the back copper layer became the ground layer.
The downside is that, by breaking horizontal and vertical onto their individual layers, it because much more difficult to visually follow the logic of a board. A situation not helped by the fill zones, which obscure other layers so I have to look at the front and back separately.
The upside of this approach is that it makes layout much easier to do. And despite the visual appearance, the net result is actually simpler despite being broken up across the two layers. Before learning these techniques my trace count was in the 180-200 range. Now it sits at 164 and this is after adding six resistors to the circuit complexity.
These are quite satisfying steps forward.
(The work described in this blog post are publicly available on Github.)